HB performance
HB has the most time demanding task per clock cycle
- SVT is a pipeline, one word is processed each clock cycle
When writing hits in Hit List Memory address depends on how many hits arrived already for a given SuperStrip?Read - Modify - Write in one clock cycle: internal Hit List Memory counters (cache tag RAM) runs at double clock speed
HB runs at slowish clock frequency: 25 ~ 28 MHz
Still should have handled all hits by the time AM roads arrive
Sending information to TF:
- one AM road produces one multi-word packet:
- all hits (4 SVX + 2 XTRP words min)
- the road itself
- total ? 300nsec (more if more hits in some SS)
Timing of all SVT on realistic data using SVTSIM in progress