AMSGLUE aka GLUE3

Still unofficial, informations in here may change without warning, use at your onw risk

HOME : back to Stefano Belforte's home page
AMSGLUE is the GLUE chip that connects the Associative Memory Sequencer (AMS) to the AM bus, which is used to talk to up to 4 AM boards (2 only planned so far). The AMSGLUE is implemented in a Quick Logic pASIC1 FPGA chip, namely the QL12x16-P100 (that means 100 pin TQFP package).

Documents:

  • AMSGLUE description

  • Chip layout (gzipped postscript file) from the output of WARP2. If you have problems with it, see the note about my postscript files in the top page,

    AMSGLUE chip synthesis with Cypress WARP2 development tools

    VHDL files
  • amsglue.vhd main chip description
  • toppkg3.vhd top leel logic
  • fsmpkg3.vhd finite state machines
  • l2_pkg3.vhd low level logic

    Control files

  • amsglue.ctl for synthesis/placing options

    Other stuff

    Stefano Belforte ( stefano.belforte@pisa.infn.it)