| function | hex address (bytes) | access | req(*) | bits | ||||||||
| start | range | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |||
| Error Register Status | XX000000 | 4 | R | TO | ID | PE | FO | |||||
| Clear Error Register | XX000000 | 4 | W | |||||||||
| Init and reset FIFOs | XX000004 | 4 | W | 1 | ||||||||
| Init and do NOT reset FIFO | XX000004 | 4 | W | 0 | ||||||||
| Test Mode Status | XX000008 | 4 | R | TM | ||||||||
| Set Test Mode | XX000008 | 4 | W | |||||||||
| Hit FIFO Status | XX00000C | 4 | R | FF_ | HF_ | EF_ | ||||||
| Output Hold Status | XX000010 | 4 | R | HD_ | ||||||||
| Hit FifoCtr FSM State | XX000014 | 4 | R | IDLE | RDY | |||||||
| micro-sequencer State | XX000018 | 4 | R | 7-0=state | ||||||||
| Output Register Write | XX00001C | 4 | W | TM | 22-0 sent to output | |||||||
| Hit Spy Pointer Status | XX000020 | 4 | R | 18=Freeze_ 17=Overflow 16-0=Pointer | ||||||||
| Clear Hit Spy Pointer | XX000020 | 4 | W | |||||||||
| Output Spy Pointer Status | XX000024 | 4 | R | 18=Freeze_ 17=Overflow 16-0=Pointer | ||||||||
| Clear Output Spy Pointer | XX000024 | 4 | W | |||||||||
| Error Line Enable | XX000028 | 4 | R/W | TO | ID | PE | FO | |||||
| Road Limit & Wild Hit | XX00002C | 4 | R/W | TM | 12-7=Wild Hit on lay 5-0, 5-0=RoadLimit | |||||||
| Phi Sector | XX000028 | 4 | R | 3-0 = Phi Sector (0-11) | ||||||||
| ID Prom | XX100000 | 40000 | R | 31-24=ASCII char 23-0=undef | ||||||||
| HIT FIFO | XX200000 | 1000 | R | TM | 31=EF_ 22-0=fifo bits | |||||||
| Hit Spy Buffer | XX280000 | 80000 | R | TM/FZ | 22-0 valid bits from Spy Buffer | |||||||
| Output Spy Buffer | XX300000 | 80000 | R | TM/FZ | 22-0 valid bits from Spy Buffer | |||||||
| micro-sequencer RAM | XX380000 | 80000 | R/W | TM | ||||||||
| SS Map | XX400000 | 80000 | R/W | TM | ||||||||
| (*) TM=only possible in Test Mode, FZ=only possible if FREEZE is asserted, TM/FZ=both | ||||||||||||