Hit Buffer Board #20 - final production board
pcb version 2.1
assembled in Jan 2002 by Verrieri
Xilinxes programmed in May 2001 by Franco
It has the non-IDT tag ram
Tested in Trieste April 2002
Failed SS_MAP/AM_MAP test, traced to small solder short
behind HRVME pins 94/95, fixed by Franco & Stefano on
April 18, lifted pin 95, cut short, resoldered.
Found need to change timing of DNCLK to ENAMP, see logbook.

passed 350K iteration of random test in TS on April 18-19

Then DLKO2 chip broke (possibly at one powerup, or
static discharge while handling).
Needs to go to Pisa for chip replacement

DLKO2 replaced by C.MAgazzu on May 9.
Then Hit/Road Spy buffer hve bit 11 stuck to 0, traced
to broken output on pin 44 of HRVME
HRVME replaced by C.Magazzu on May 20

passed 1.4M iteration of random test in TS on May 13-16
passed 2.8M random test iteration at 23MHz in TS May 16-21

Board O.K.

BEWARE: NEEDS NON STANDARD JUMPERS !!!
U66 4F1 = mid (no jumper)
U66 4F0 = low (jumper to GND = upper row)