Hit Buffer Board #9 - final production board
pcb version 2.1
assembled in May 2000
quick test in Pisa 11-12 May 2000
full test in Trieste 20-26 May 2000
passed ~60K iter of random test in TS June 13

July 5th: fails random test.
July 10: resolder pin 7 of MLDATA. resolder pin 3-4-5 of OUT0
         pour solder into GDATA 0 via underneath MLDATA/XU2 where top line from
          pin 7 enters to internal layers.
July 11: pour solder into READY via underneath OUTEN/XU3 where top line from
          pin 42 enters to internal layers.
         desoldered pin 95 of HRVME/XU11 (AMAPDD14 driver) from pcb
         (pad damaged in the  process) and short AMPADD14 to BMAPADD14
         with wire on top between vias.
         Now BMAPADD14 line has fanout 13 vs. 6 for all Bmapadd/Cmapadd
         7 for all Amapadd.

passed hb_hlm_test and 200K iter of random test in TS July 11 after fixes.

shipped to Franco Spinella at Fnal on July 17 2000.

Board working but de-rated to "grade B".

Dec 20: SS/AM map fail repeatedely. Removed and shipped to Italy for repair.

Feb 10 2001: comes back from Eclipse to Trieste with replaced HRVME.
SS/AM map is now OK. Intermittent problems with H/R spy disappeared after
touching around. Passes 220K iter or random test.
Feb 14/19 2001: passes 1.5 million iter of random test.

Board OK, but "unsafe". Possibly all problems are solved though.
Will put again in SVT crates in B0.