Modififcations proposed/needed to Merger as build on August 4 1999:

1.  use SMD electrolitic capacitors like HB for Vcc filtering
2.  move holes for FP bracket closer to FP, aling with handle holes
3.  move back Mentor LEDS, align plastic case with pcb edge
4.  use single resistor for pulling up unused fifo pins (like HB)
5.  replace SSOP resistor network on FQ busses with single SMD's
6.  enlarge via holes on FQ busses (where staggered) to fit standard pin strips
7.  use 0805 resistors for ESD strip
8.  use 0805 resistors for clock termination resistors (120 Ohm)
9.  check angle of traces to pads for small SMD's
10. modify pico-fuse footprint, move holes closer
11. correct footprint for roboclock Tmode 100 Ohm resistor, move holes closer
12. rotate 180 degrees jumpers for roboclock Tmode to have Vcc pins
    aligned with Vcc pins on nearby 3-point jumpers.
12. swap D12 and D10 (Hold and Ds leds on bottom output)
13. pull up TDO at 3.3 V on all JTAG chains (3)
14. put termination on long line from VMEINT to ALS08 that drives the
    comparison test pin (series RC).
15. move AC00/AS32 that generates WE_ to A/B/C/D SPY RAMS closer to RAMs
16. connect HalfFull_ to fifo's PAF_ pin rather then HF_
17. increase pull-up resistors on Altera signals to 10~20K
18. pull up dip switches conencted to VME Altera to 3.3V rather then 5V
19. remove extra etch stub above arbitpar pin 178 (RESET).