HB Xilinx Programming
All Xilinx XDM source and output files that describe the logic of
each chip, the interanl map and partitioning of resources, the pins
etc. For each chip project always refer to the .eqn file for the
correct logic description. Some abel and/or pds files are kept for
documentation or history purpose, but in a few cases changes could
only be made to he .eqn files to preserve pin allocation etc. so the
abl and pds, while usefull to udnerstand the behaviour, may contain
small subtle bugs or lack some needed extra function.
The actual chip programming files needed to burn this logic into the
Xilinx chips on the Xilinx HW-130 programmer are in the Hit Buffer
firmware page.
Also old versions of some chips
Stefano Belforte
Last modified: Wed Jul 31 13:35:30 MET DST