AMS Xilinx chips programming

Still unofficial, informations in here may change without warning, use at your onw risk

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VME_CTR: the VME slave

PLUSASM files:
  • vme_ctr.pld top level file

    ABEL files:

  • vmefsm.abl state machine
  • selboard.abl VME protocol
  • v_co_dec.abl address decoding

    More:

  • vme_ctr.pin pin assignement
  • FSM block diagram (A3-landscape gzipped PostScript or gif) If you have problems with the postscript file, see the note about my postscript files.

    INPUT: the INPUT channel control

    PLUSASM files:
  • input.pld top level file
  • parity.pld parity calculation

    ABEL files:

  • fifo_ctr.abl fifo controller
  • fifo_reg.abl fifo register
  • ee_reg.abl end event register
  • vme_reg.abl vme_accessed registers

    More:

  • input.pin pin assignement
  • block diagram as A3-landscape gzipped PostScript

    INPREG: the input data register between SSMAP and GLUE

    PLUSASM files:
  • inpreg.pld top level file

    ABEL files:

  • inprga.abl all chip logic in this file

    More:

  • inpreg.pin pin assignements
  • block diagram as A3-landscape gzipped PostScript

    OUT_CTR: the OUTPUT channel control

    PLUSASM files:
  • out_ctr.pld top level file

    ABEL files:

  • out_ct.abl all chip logic in this file

    More:

  • out_ctr.pin pin assignement

    HSPY_CT: the HIT SPY buffer control

    PLUSASM files:
  • hspy_ct.pld top level file

    ABEL files:

  • hspy_co.abl spy address counter
  • hspy_io.abl multiplexer and i/o control

    More:

  • hspy_ct.pin pin assignement
  • block diagram as A3-landscape gzipped PostScript

    OSPY_CT: the OUTPUT SPY buffer control

    PLUSASM files:
  • ospy_ct.pld top level file

    ABEL files:

  • ospy_co.abl spy address counter
  • ospy_io.abl multiplexer and i/o control

    More:

  • ospy_ct.pin pin assignement
  • block diagram as A3-landscape gzipped PostScript

    USQ_OREG: the microsequencer Output register

    PLUSASM files:
  • usq_oreg.pld top level file

    ABEL files:

  • usq_orga.abl all chip logic in this file

    More:

  • usq_oreg.pin pin assignement
  • block diagram as A3-landscape gzipped PostScript

    USQ_SREG: the microsequencer Status register

    PLUSASM files:
  • usq_sreg.pld top level file

    ABEL files:

  • usq_srga.abl all chip logic in this file

    More:

  • usq_sreg.pin pin assignement
  • block diagram as A3-landscape gzipped PostScript
    Stefano Belforte ( stefano.belforte@pisa.infn.it)